CALL-26-2019-1 - Researcher position in the Communication Technologies Division – PHYCOM Department

30 October 2019 - Expires: 30 November 2019

The Communication Technologies Division at CTTC invites applications for one Researcher position in the framework of the 5G-TRIDENT project (RTI2018-099841-B-I00) funded by the Spanish “Ministerio de Ciencia, Innovación y Universidades”. The 5G-TRIDENT project is contributing to the development of 5G radio access network (RAN) infrastructure and mobile devices by addressing some of the principal technological challenges stemming from their inherent flexibility and efficiency requirements. Specifically, the expected contribution of the successful applicant will focus on design and implementation aspects, with special emphasis on reconfigurability and cost- and energy efficiency enhancement. In particular, the study and implementation of techniques and advanced mechanisms for the intelligent distribution and reconfiguration of 5G communication stack functions onto different RAN infrastructure nodes will be carried out by the successful applicant.

The successful applicant will preferably hold a Ph.D. degree in Telecommunications Engineering, Electronic/Computer Engineering, Computer Science or a closely related field. Candidates holding a similar M.Sc. degree combined with relevant working experience in the industry will be considered too. The ideal candidate should have proven experience in the areas of software defined radio (SDR), digital signal processing (DSP), hardware-software co-design for embedded systems and high-speed digital design targeting modern FPGA devices. The applicant is expected to be a proactive team player, carry out innovative applied research, and participate in dissemination activities.

QUALIFICATIONS AND EXPERIENCE

We are looking for a highly motivated and enthusiastic researcher/engineer with solid research, analytical, problem-solving and the programming skills quoted below. The candidate must have fluency in English (spoken and written) and advanced communication skills. Previous experience in fields related to the specific position will be considered a clear plus for the candidate.

Required skills:

  • At least 5 years’ experience in DSP algorithm modeling using Matlab.
  • Excellent FPGA algorithm development skills using VHDL or Verilog HDL languages with special emphasis on advanced RTL coding skills to guarantee timing closure in dense and/or high-speed HDL designs. Priority will be given to candidates with a solid FPGA implementation portfolio of DSP algorithms. Expert knowledge of the the Xilinx Vivado Design Suite is a must.
  • At least 5 years’ experience in firmware development with C or C++, Linux shell scripting, Python and HDL languages, using debugging and profiling tools (e.g., gdb, perf) and version control systems (Git) and IDEs.
  • The applicants must have a deep understanding of OS architecture (Linux or other UNIX-like OS), a strong background on embedded systems, Linux kernel space and user space programming, RTOS and real-time programming techniques, be familiar with the modern ARM 32 and 64-bit architecture and GNU compiler toolchain. The candidate must also possess strong experience in HW-SW co-design practices applied to FPGA-based SoC devices.
  • Hands-on knowledge or previous exposure on wireless communications standards, digital signal processing techniques and SDR.
  • Experience in participating in the entire development cycle: from system conception and specifications, through high level modeling, FPGA development, real-time testing, debugging and lab-based performance validation of the developed algorithm or (sub-)system.
  • Outstanding oral and writing English skills.
  • Effective verbal and written communication skills, and ability to work in an international team.

Valuable skills:

  • Hands-on experience on Xilinx Partial Configuration design cycle will be considered a valuable asset.
  • It will be highly appreciated having design experience with specific SDR platforms where FPGA devices are used as DSP co-processors e.g., Ettus USRP X and E series platforms, Xilinx ZC706/ZCU102 boards combined with the AD-FMCOMMS2/3 SDR RF front-end.
  • Prior research experience in academia or industry
  • Career distinctions
  • Experience in leading and/or participating in the preparation of scientific publications.
  • Experience in preparation of EC funded research grant proposals.
  • Experience from participating in national and international research projects with partners from academia and industry.

CONDITIONS

A full-time fixed-term contract is offered. The duration of the contract is subject to the 5G-TRIDENT project duration (approximately 1 year, depending on the exact hiring date). Immediate incorporation after the closing of the call is expected. The salary will be determined according to qualifications and work experience of the candidate and will be in the range between 28000 and 40000 € (gross per year). CTTC is particularly interested in candidates with good balance of academic qualifications and know-how in their field of knowledge.

Applications should include:

  • Full CV including name (email address, etc.) of three referees.
  • Scanned copies of all the obtained degree titles (e.g., B.Sc., M.Sc. and/or Ph.D. titles). When a title is expected to be obtained in a short timeframe (e.g., Ph.D. degree), the candidate should provide a letter signed by his/her University supervisor indicating the estimated examination/graduation date.
  • Cover letter stating the motivation and suitability of the candidate.

The documents should be sent in PDF format through this online application. Applications for the position received by email will not be taken into consideration. CVs and any other data gathered during this process will be handled confidentially.

The closing date for the applications is November 30, 2019.

For further information, please contact rrhh@cttc.es.

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